Recently I wrote an assembler for DLX architecture using Antlr 3 as an assignment of the Advance architecture course module.
Target
Main target of this assemble is to generate an optimized assembly code by filling delayed branch slots. It can take High level language code segment as a input. First it should generate unoptimized assembly code and then optimized it to fill delayed branch slots.
Why Antlr ?
Antlr supports String template which is a java template engine that can be used to generate any type of formated texts ( source codes, emails, etc). So using string template we can perform language transformation very easily. For example Java to C#, C++ etc. For more details look at Here .
you can find antlr 3 samples at github. I modified the cminus sample available at github for this project.
About project
I used Cminus as High level language and DLX (RISC architecture) as target platform. It used Antlr version 3.
This project is available at Google-code svn repository.
Limitations of the Code
Main Development Steps
Building Project and Run
you can build project using maven3. ($mvn clean install) .
Maven build will execute assembler after the build and generate optimized code for sample.txt. asem_optimized.txt and asem_unoptimized.txt will be created after the build.
Improvements to the Code base
I warmly welcome your suggestions and ideas to improve this assembler.
Target
Main target of this assemble is to generate an optimized assembly code by filling delayed branch slots. It can take High level language code segment as a input. First it should generate unoptimized assembly code and then optimized it to fill delayed branch slots.
Why Antlr ?
Antlr supports String template which is a java template engine that can be used to generate any type of formated texts ( source codes, emails, etc). So using string template we can perform language transformation very easily. For example Java to C#, C++ etc. For more details look at Here .
you can find antlr 3 samples at github. I modified the cminus sample available at github for this project.
About project
I used Cminus as High level language and DLX (RISC architecture) as target platform. It used Antlr version 3.
This project is available at Google-code svn repository.
Limitations of the Code
- Fills only delayed branched that occurs after unconditional jump. ( j )
- Supports multiple for, while and doWhile loops in high level language.
- supports only addition.
- supports only == and <
- do not support variable = variable + variable type assignments
Main Development Steps
- Building Lexer and Parser using lexer rules.
- used Antlr IDE ( downloaded via antlr site) to generate lexer and parser.
- Unoptimized code generation using string template.
- Wrote optimizer and Optimized code generation.
- Mavenized the project.
Building Project and Run
you can build project using maven3. ($mvn clean install) .
Maven build will execute assembler after the build and generate optimized code for sample.txt. asem_optimized.txt and asem_unoptimized.txt will be created after the build.
Improvements to the Code base
I warmly welcome your suggestions and ideas to improve this assembler.
Main target of this assemble is to generate an optimized assembly code by filling delayed branch slots. It can take High level language code segment as a input. First it should generate unoptimized assembly code and then optimized it to fill delayed branch slots. little girl pink outfits , little girl yellow dress , boys red pants , green dress for kids
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